<?xml version="1.0" encoding="utf-8" standalone="yes"?><rss version="2.0" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Side-Channel on CuraSec</title><link>https://curasec.metacog.co.kr/tags/side-channel/</link><description>Recent content in Side-Channel on CuraSec</description><generator>Hugo</generator><language>en-us</language><lastBuildDate>Mon, 24 Aug 2026 13:10:29 +0000</lastBuildDate><atom:link href="https://curasec.metacog.co.kr/tags/side-channel/index.xml" rel="self" type="application/rss+xml"/><item><title>Prefix-Cache Side Channel Exposes Hidden LLM API Reseller Dependencies</title><link>https://curasec.metacog.co.kr/insights/2026-08-24-uncovering-and-understanding-hidden-dependencies-in-the-llm/</link><pubDate>Mon, 24 Aug 2026 13:10:29 +0000</pubDate><guid>https://curasec.metacog.co.kr/insights/2026-08-24-uncovering-and-understanding-hidden-dependencies-in-the-llm/</guid><description>&lt;ul>
&lt;li>&lt;strong>Engineer — Learn:&lt;/strong> CacheTracer demonstrates that LLM API reseller chains are often multi-layer and opaque — prompts may traverse undisclosed intermediaries who can inspect or alter them. No patch exists; the takeaway is to audit which LLM API endpoints you use and prefer direct provider access or contractually disclosed routing for sensitive workloads.&lt;/li>
&lt;li>&lt;strong>SOC/IR — Skip&lt;/strong>&lt;/li>
&lt;li>&lt;strong>Leader — Plan:&lt;/strong> This research surfaces a concrete vendor-risk gap: LLM API resellers may introduce undisclosed intermediaries with access to prompt and response content, creating confidentiality exposure. Add LLM API supply chain transparency (direct vs. reseller routing, data-handling attestations) to your AI vendor risk review criteria this quarter.&lt;/li>
&lt;/ul></description></item><item><title>Remote Spectre Attack Leaks JWTs from Cloudflare Workers at 12 bps</title><link>https://curasec.metacog.co.kr/insights/2026-08-20-cloudflare-workers-spectre-attack-leaks-jwt-from-co-located/</link><pubDate>Thu, 20 Aug 2026 11:39:11 +0000</pubDate><guid>https://curasec.metacog.co.kr/insights/2026-08-20-cloudflare-workers-spectre-attack-leaks-jwt-from-co-located/</guid><description>&lt;ul>
&lt;li>&lt;strong>Engineer — Plan:&lt;/strong> If you process sensitive credentials or JWTs in Cloudflare Workers, audit whether those secrets could be exposed to co-tenant side-channel leakage; consider moving high-sensitivity auth operations off shared serverless platforms or reducing secret lifetimes in Workers.&lt;/li>
&lt;li>&lt;strong>SOC/IR — Learn:&lt;/strong> Novel remote Spectre variant demonstrating cross-tenant memory leakage in shared serverless runtimes; no IOCs or detection surface exist yet, but the technique advances the threat model for cloud-hosted execution environments.&lt;/li>
&lt;li>&lt;strong>Leader — Learn:&lt;/strong> Research confirms meaningful cross-tenant isolation risks in shared serverless platforms; useful context for vendor risk conversations with Cloudflare and for evaluating where sensitive auth tokens are processed in your stack.&lt;/li>
&lt;/ul></description></item><item><title>INTERRUPT INJECTION Bypasses Spectre v2 Mitigations on Linux x86</title><link>https://curasec.metacog.co.kr/insights/2026-08-07-new-interrupt-injection-attack-can-bypass-spectre-v2-defense/</link><pubDate>Fri, 07 Aug 2026 00:21:58 +0000</pubDate><guid>https://curasec.metacog.co.kr/insights/2026-08-07-new-interrupt-injection-attack-can-bypass-spectre-v2-defense/</guid><description>&lt;ul>
&lt;li>&lt;strong>Engineer — Learn:&lt;/strong> MIT CSAIL research shows a timing gap in branch-predictor sanitization can be re-poisoned by a local unprivileged process, defeating default Spectre v2 mitigations on AMD Zen 2 and Intel; no patch or workaround is available yet, but engineers running multi-tenant Linux workloads should track vendor microcode and kernel responses as they emerge.&lt;/li>
&lt;li>&lt;strong>SOC/IR — Skip&lt;/strong>&lt;/li>
&lt;li>&lt;strong>Leader — Skip&lt;/strong>&lt;/li>
&lt;/ul></description></item><item><title>TONTOU CPU attack bypasses Spectre v2 mitigations, leaks Linux secrets</title><link>https://curasec.metacog.co.kr/insights/2026-08-07-new-tontou-cpu-attack-bypasses-spectre-v2-fixes-leaks-linux/</link><pubDate>Fri, 07 Aug 2026 00:21:58 +0000</pubDate><guid>https://curasec.metacog.co.kr/insights/2026-08-07-new-tontou-cpu-attack-bypasses-spectre-v2-fixes-leaks-linux/</guid><description>&lt;ul>
&lt;li>&lt;strong>Engineer — Learn:&lt;/strong> No patch or mitigation is available yet; this research demonstrates that existing Spectre v2 defenses can be bypassed, which is worth tracking for Linux kernel hardening decisions when a fix lands.&lt;/li>
&lt;li>&lt;strong>SOC/IR — Skip&lt;/strong>&lt;/li>
&lt;li>&lt;strong>Leader — Skip&lt;/strong>&lt;/li>
&lt;/ul></description></item><item><title>FLINT: 5G PHY-layer side channels fingerprint federated learning models</title><link>https://curasec.metacog.co.kr/insights/2026-07-20-flint-fingerprinting-federated-learning-architectures-from-5/</link><pubDate>Mon, 20 Jul 2026 14:31:24 +0000</pubDate><guid>https://curasec.metacog.co.kr/insights/2026-07-20-flint-fingerprinting-federated-learning-architectures-from-5/</guid><description>&lt;ul>
&lt;li>&lt;strong>Engineer — Learn:&lt;/strong> Novel finding that 5G PDCCH scheduling metadata leaks enough temporal pattern to identify FL model architecture families, enabling targeted downstream attacks. No patch exists; worth factoring into FL-over-cellular deployment design (e.g., traffic shaping, scheduling obfuscation) before adopting this stack.&lt;/li>
&lt;li>&lt;strong>SOC/IR — Skip&lt;/strong>&lt;/li>
&lt;li>&lt;strong>Leader — Skip&lt;/strong>&lt;/li>
&lt;/ul></description></item><item><title>Vogls: open-source Verilog simulator for pre-silicon power side-channel analysis</title><link>https://curasec.metacog.co.kr/insights/2026-07-20-vogls-a-fast-interactive-full-timing-simulator-for-pre-silic/</link><pubDate>Mon, 20 Jul 2026 14:31:24 +0000</pubDate><guid>https://curasec.metacog.co.kr/insights/2026-07-20-vogls-a-fast-interactive-full-timing-simulator-for-pre-silic/</guid><description>&lt;ul>
&lt;li>&lt;strong>Engineer — Learn:&lt;/strong> Relevant for teams designing or evaluating cryptographic hardware; Vogls enables pre-silicon DPA testing at RTL/gate level, which could inform security requirements for custom silicon or FPGA-based crypto implementations.&lt;/li>
&lt;li>&lt;strong>SOC/IR — Skip&lt;/strong>&lt;/li>
&lt;li>&lt;strong>Leader — Skip&lt;/strong>&lt;/li>
&lt;/ul></description></item></channel></rss>